Principal SerDes Design Engineer

About this role

<p>We are seeking an experienced SerDes Design Engineer to help deliver disruptive high-speed interconnect technology powering the next generation of AI infrastructure. In this role, you will lead the architecture and design of cutting-edge SerDes solutions for next-generation transceivers, driving innovations that enable higher bandwidth, lower power, and industry-leading performance for AI networking and optical connectivity.</p> <p><strong>Locations</strong>: Irvine, CA (HQ) | San Jose, CA | Vancouver, BC | Ottawa, ON</p> <p><strong>What You Will Do:</strong><br>• Define architecture, specifications, and circuit topologies for next-generation SerDes<br>• Overview development of system-level modelling, with behavioral models (e.g., MATLAB, SystemVerilog, Verilog-A) to analyze link budgets, equalization strategies, and jitter budgeting<br>• Design high-performance analog/mixed-signal circuits in advanced node technologies<br>• Develop and overview the design of critical blocks including RX/TX equalization (CTLE, DFE), High-speed PLLs, Phase interpolators, DLLs, TDCs<br>• Implement digitally assisted analog circuits, background calibration, and adaptive loops to improve Power, Performance, Area (PPA)<br>• Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts<br>• Overview of the analysis of Signal Integrity and Power Integrity to achieve system-defined targets<br>• Lead lab validation, debugging and characterization of SerDes IPs within our state-of-the-art lab<br>• Correlate silicon measurements with simulated data, and lead performance optimization in the system environment</p> <p><strong>What You Will Bring: </strong><br>• Master’s degree and/or PhD in Electrical Engineering or related fields with 10+ years of relevant experience in SerDes design<br>• Proven record of taking high-speed SerDes design to tape-out and volume production<br>• Experience in lab bring-up, characterization, and debugging designs that reach out production<br>• Must have extensive experience with advanced node technologies (16nm/12nm, 7nm, 5nm, 3nm, 2nm processes)<br>• Prior experience in cross-functional interaction to deliver IP and ensuring seamless integration in SOCs<br>• Strong communication and documentation skills</p> <p><em>Annual Base Salary Range for US: $150,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)</em></p>