Principal Product Engineer
Celerocommunicationsinc · Irvine, CA · 2026-06-24
About this role
<p><strong>About the Job </strong></p> <p>Celero Communications is building next‑generation coherent DSP integrated circuits for high‑performance optical networking. We are seeking a <strong>hands‑on, technically deep Principal Product Engineer</strong> to drive the transition of Celero’s products from development into qualified, high‑yield, high‑volume manufacturing.</p> <p>This is a <strong>ground‑floor opportunity</strong> to work directly within Celero’s engineering and operations teams, playing a critical role in product success while helping establish the operational foundation of a growing semiconductor company. You will <strong>define and execute the productization strategy</strong> across New Product Introduction (NPI), reliability, test, quality, and manufacturing ramp for advanced coherent DSP ICs delivered as <strong>Known Good Die (KGD)</strong> and packaged products.</p> <p><strong>What you Will Do:</strong></p> <p><strong>New Product Introduction (NPI)</strong></p> <ul> <li>Drive end‑to‑end NPI execution from first silicon through qualification, sampling, and volume production.</li> <li>Define NPI milestones, readiness criteria, and exit conditions across design, test, reliability, manufacturing, and operations.</li> <li>Work closely with silicon design, DFT, test engineering, supply chain, and operations to ensure manufacturable, testable product launches.</li> <li>Identify technical and operational risks early and lead mitigation efforts through data‑driven decision making.</li> </ul> <p><strong>Reliability &amp; Qualification</strong></p> <ul> <li>Define and execute reliability and qualification strategies for advanced‑node coherent DSP ICs, including Known Good Die (KGD) qualification.</li> <li>Develop and own reliability stress plans (HTOL, HTSL, temperature cycling, ESD, latch‑up, early‑life failure, etc.)</li> <li>Manage external reliability lab execution, including coverage definition, scheduling, reporting, and failure analysis.</li> <li>Analyze qualification data and drive product release readiness based on measured risk and maturity.</li> </ul> <p><strong>Product Quality </strong></p> <ul> <li>Define internal product quality targets aligned with application and market requirements.</li> <li>Own quality metrics related to silicon maturity, yield stability, and manufacturing readiness.</li> <li>Drive root‑cause analysis for quality or reliability excursions and lead corrective actions.</li> <li>Support customer quality discussions as needed, primarily through preparation of data and technical analysis.</li> </ul> <p><strong>Test, Sampling &amp; Production Ramp</strong></p> <ul> <li>Lead technical engagement with foundry and OSAT partners from wafer fabrication through back‑end processing and shipment.</li> <li>Define and refine production test strategies with test engineering, balancing coverage, cost, yield, and guard‑banding.</li> <li>Drive engineering builds, characterization lots, and production ramps.</li> <li>Ensuring robust handoff from engineering tests flows to stable production manufacturing.</li> </ul> <p><strong>Yield Optimization &amp; High‑Volume Manufacturing</strong></p> <ul> <li>Own yield learning and yield optimization from early silicon through high‑volume manufacturing</li> <li>Perform deep analysis of wafer sort, die sort, and final test data to identify yield limiters.</li> <li>Drive cross‑functional corrective actions across design, process, test, and manufacturing.</li> <li>Establish yield targets, dashboards, and regular yield reviews to support sustained volume production.</li> </ul> <p><strong>What you Will Bring:</strong></p> <ul> <li>Bachelor’s degree in electrical engineering or related fields. Master’s degree preferred.</li> <li><strong>10+ years</strong> of experience in product engineering, silicon manufacturing, reliability engineering, or related IC lifecycle roles.</li> <li>Proven experience taking complex ICs from first silicon through qualification and volume manufacturing.</li> <li>Strong background in reliability qualification, stress testing, and failure analysis</li> <li>Experience with wafer‑level test, Known Good Die (KGD), and production test flows.</li> <li>Demonstrated success driving yield learning and yield improvement.</li> <li>Strong analytical skills and comfort working directly with large manufacturing and test data sets.</li> <li>Excellent cross‑functional collaboration skills with a bias toward technical execution</li> </ul> <p><strong>Why Join Celero</strong></p> <ul> <li>Be a <strong>foundational technical contributor</strong> shaping how Celero products scale into manufacturing.</li> <li>Deep hands‑on ownership of NPI, reliability, yield, and manufacturing readiness for industry‑defining coherent DSP ICs</li> <li>Opportunity to gain experience technical influence and scope while remaining close to the product and the data.</li> <li>High‑impact role in a fast‑moving startup where strong execution directly affects company success.</li> </ul> <p><strong>Salary Range:</strong></p> <p>$150,000 - $250,000 Base Annually<br>The final offer will be determined based on job-related skills, experience,…
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