Principal Electrical Engineer – Smart Cable Modules

About this role

<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p><span data-contrast="none">We are looking for a Principal Electrical Engineer to take strategic ownership of our Smart Cable Module (SCM) hardware platform. This is a senior individual-contributor role that combines deep technical leadership with cross-organizational influence - you will define the electrical architecture of our next-generation active copper cable assemblies and pluggable modules in OSFP, QSFP-DD, and emerging form-factor enclosures targeting 400G, 800G, and beyond.</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></p> <p><span data-contrast="none">As a Principal Engineer you will set design direction, establish engineering standards, and serve as the primary technical authority on module hardware across the full product lifecycle - from concept and architecture through production release and sustaining engineering. You will partner with cross functional team, contract manufacturers, firmware teams, and hyperscale customers to deliver differentiated, high-reliability products for data center AI/ML fabric and high-performance computing applications.</span><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></p> <p><span data-ccp-props="{"335559738":80}"> </span></p> <p><strong><span data-contrast="none">Key Responsibilities</span></strong><span data-ccp-props="{"335559738":340,"335559739":100,"335572079":8,"335572080":4,"335572081":11824430,"469789806":"single"}"> </span></p> <p><strong><span data-contrast="none">Architecture & Technical Leadership</span></strong><span data-ccp-props="{"335559738":60,"335559739":60}"> </span></p> <ul> <li data-leveltext="•" data-font="" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":640,"335559991":320,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="none">Define and own the end-to-end electrical architecture for smart cable modules, including SerDes channel topology, power delivery strategy, and thermal budgeting for muti-Gig (112G PAM4 and 56G NRZ ) designs</span><span data-ccp-props="{"335559738":44,"335559739":44}"> </span></li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":640,"335559991":320,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="none">Establish and maintain internal electrical design standards, PCB layout rules, and SI/PI guidelines that the broader hardware team </span><span data-ccp-props="{"335559738":44,"335559739":44}"> </span></li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="1" data-list-defn-props="{"335552541":1,"335559685":640,"335559991":320,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="3" data-aria-level="1"><span data-contrast="none">Lead technical reviews (architecture, schematic, layout, DVT) and provide…