Principal DSP Firmware Engineer
Celerocommunicationsinc · Ottawa, Ontario, Canada · 2026-06-24
About this role
<h3 data-start="350" data-end="370">About the Role</h3> <p>We are seeking <strong>Principal DSP Firmware Engineer</strong>&nbsp;to lead the architecture, development, and validation of firmware supporting advanced DSP algorithms on next‑generation silicon platforms. You will play a critical role in defining DSP firmware strategy, owning pre‑silicon development, and leading silicon bring‑up, while mentoring engineers across the team.</p> <p>This role is ideal for a senior technologist who can own end‑to‑end DSP firmware subsystems and drive technical decisions from architecture through deployment.</p> <p><strong>Locations Available: Ottawa, ON&nbsp;</strong><strong>–&nbsp;</strong><strong>Córdoba, Argentina</strong>&nbsp;<strong>–&nbsp;</strong><strong>Irvine, CA</strong></p> <p><strong>Key Responsibilities:</strong></p> <ul> <li>Lead the architecture, design, and implementation of DSP firmware subsystems</li> </ul> <ul> <li>Define FW control interfaces, configuration parameters, and runtime debug controls and diagnostics</li> </ul> <ul> <li>Drive collaboration with system architects and DSP designers on algorithm partitioning, FSM design, and firmware controls <ul> <li>Design finite state machines governing DSP acquisition and tracking control loops</li> <li>Optimize firmware for real‑time operation, latency, throughput, and resource usage to meet FW specifications</li> </ul> </li> </ul> <ul> <li>Own pre‑silicon test‑driven development framework for DSP firmware</li> </ul> <ul> <li>Hardware Abstraction Layer generation and integration with simulation, emulation platforms</li> <li>Collaborate with verification teams to align firmware validation strategy with regression infrastructure</li> </ul> <ul> <li>Drive regression strategy, automation, and test reusability, including customer release automation using Jenkins pipelines</li> <li>Debug complex firmware, DSP, and system‑level issues</li> </ul> <ul> <li>Own bring-up of DSP acquisition flows</li> <li>Analyze issues using firmware logs, traces, and instrumentation</li> <li>Support regression testing teams by identifying root causes and improving test coverage</li> </ul> <ul> <li>Enforce firmware coding standards, test coverage and best practices</li> </ul> <ul> <li>Mentor and guide junior firmware engineers</li> <li>Contribute to defining development workflows, and long‑term maintainability</li> </ul> <p><strong>Required Qualifications</strong></p> <ul> <li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.</li> <li>6–10 years of experience in embedded/firmware development.</li> <li>Strong background in DSP theory and algorithm implementation</li> </ul> <ul> <li>Optimizing FFT algorithms and FFT‑based resampling (preferably on SiFive processors)</li> </ul> <ul> <li>Deep experience architecting DSP‑centric firmware systems and expert‑level programming skills in C/C++</li> </ul> <ul> <li>Familiar with emulation testing frameworks and firmware‑level mocking strategies</li> </ul> <ul> <li>Experience with pre‑silicon development, silicon bring‑up, and system‑level debugging</li> </ul> <ul> <li>Familiar with UVM based verification environments and SystemVerilog test methodologies</li> <li>Familiar with FPGA and emulation platforms for pre silicon validation</li> </ul> <ul> <li>Experience with silicon bring-up, board bring-up, and complex firmware debugging.</li> <li>Ability to work cross‑functionally with systems, DSP, verification, and hardware teams</li> <li>Strong technical leadership and mentoring skills</li> </ul> <p><strong>Preferred Qualifications</strong></p> <ul> <li>Knowledge of <ul> <li>CMIS (Common Management Interface Specification) standards for optical modules</li> <li>RISC V architecture (SiFive or similar)</li> </ul> </li> <li>Familiarity with <ul> <li>Operating environments: Embedded Linux or RTOS (FreeRTOS, Zephyr, VxWorks)</li> <li>Boot architecture: U‑Boot, custom multi‑stage boot flows</li> <li>Low‑level SoC and hardware interfaces: PCIe, Ethernet, I2C, SPI, UART</li> </ul> </li> </ul> <p>&nbsp;</p> <p><strong>Salary Range for US&nbsp;</strong></p> <p>$150,000 - $250,000 Base Annually&nbsp;<br>The final offer will be determined based on job-related skills, experience, qualifications, and location.</p> <p>&nbsp;</p>
Skills asked for
- jenkins
- c++
- linux
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