Lead SoC Verification Engineer
Anodize · Los Altos, CA · 2026-07-14
About this role
<h2><strong>Lead SoC Verification Engineer</strong></h2> <p><strong>Summary</strong></p> <p>We’re a well-funded, stealth startup building a next-generation, end-to-end computing platform powered by a custom, high-performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry-leading design, we are building the optimized silicon foundation for our software platform from the ground up.</p> <p>We’re building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Verification Engineer, you will help establish the verification and validation methodology for our end product.</p> <p><strong>Responsibilities</strong></p> <ul> <li><strong>Cross Functional reviews:</strong> Participate in microarchitecture and design reviews with the designers to better understand the design to help develop a comprehensive DV plan. Develop a detailed test bench and plan for the blocks you will be working on and have them reviewed with the design and SW teams.</li> <li><strong>DV infrastructure development:</strong>&nbsp; Develop scalable test benches and libraries for block level and full chip level verification. Ensure stimulus is portable across verification, emulation and ASIC platforms.&nbsp; Implement test harness to collect various coverage metrics and scoreboards to track progress through regressions.</li> <li><strong>Full chip/Block level verification:</strong> Develop directed/constrained random/random test cases to fully stress the design, and track discovered bugs.</li> <li><strong>System Validation: </strong>Work closely with the validation team to use an emulation platform for accelerated verification and SW/HW co development.</li> </ul> <p><strong>Minimum Requirements</strong></p> <ul> <li>10+ years of experience in verifying complex ASICs.</li> <li>Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.</li> <li>Deep knowledge of industry-standard on-chip interconnect protocols (AMBA CHI/AXI/AXI-S/APB).</li> <li>Fluent in System verilog/System-C and UVM.</li> <li>Experience verifying designs with multiple power domains using UPF and industry standard tools.</li> <li>Proven track record of taking products through first pass Silicon success.</li> </ul> <p>&nbsp;</p> <p><strong>Preferred Qualifications</strong></p> <ul> <li>Experience with verifying multi-media SOCs.</li> <li>Experience working directly with Arm cores and subsystems.</li> <li>Experience with modeling and performance validation.</li> <li>Exposure to Silicon bring-up.</li> </ul>
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