CPU Design Architect / Principal Digital Design Engineer

About this role

<p><strong>Job Description:</strong><br>Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: <br>- Perform CPU development and design integration for MIPS CPU subsystem.  <br>- Explore latest technologies and be responsible for conducting fundamental research on new directions in CPU architecture  <br>- Contribute ideas for advanced CPU performance features - analyze workloads in details, identify performance bottlenecks and opportunities, bring a data driven approach to tradeoffs in CPU design, derive architecture and micro-architecture to design/model implantation team, and bring ideas to successful silicon</p> <p><strong>Minimum Qualifications: </strong><br>- Master Degree in Electrical Engineering, Computer Science or Computer Engineering. <br>- At least 5 years of CPU related Architect/RTL/Verification/Implementation design experience  <br>- Knowledge and practical experience with common RISC CPU architecture. <br>- Familiarity with chip digital design flow, including RTL integration, simulation, STA. <br>- Understanding of high performance techniques and trade-offs in a CPU microarchitecture  <br>- Ability to problem solve and prove own ideas </p> <p><strong>Preferred Qualifications:</strong> <br>- PhD in Electrical Engineering, Computer Science or Computer Engineering is a PLUS <br>- 8+ years of CPU related Architect/RTL/Verification/Implementation design experience  <br>- Strong CPU architecture knowledge and micro-architecture knowledge  <br>- Familiarity with Symmetric Multi-processing (SMP) and Snoop-based multi-processor architecture. <br>- Familiarity with synthesis, power analysis and post silicon debugging <br>- Cross-site working experience is a PLUS. <br>- Common knowledge in modeling/DV/OS is a PLUS. <br>- Experience with Foundry, Post-Silicon, FPGA, DVT, SLT debug is a PLUS.</p> <p>#LI-DNI</p>